| 摘要 |
PURPOSE:To microscopically form a wiring pattern on a semiconductor integrated circuit using a low resistance wiring material by a method wherein a wiring pattern is formed of a polycrystalline layer, and a part or the entire polycrystalline silicon layer is converted into that of silicide. CONSTITUTION:The prescribed region of a polycrystalline silicon layer 10 is selectively converted into a silicon dioxide film 15, the region which is turned to the base is coated by a photosensitive resin layer 13, high density P<+> phosphorus ions are implanted, and a phosphorus-doped polycrystalline silicon layer 4 is formed. The photosensitive resin layer 13 is removed, an emitter diffusion is performed using the phosphorus-doped polycrystalline silicon layer 14 as the source of diffusion, an emitter region 16 is formed, and a collector lead-out region 17 is formed simultaneously. A polycrystalline silicon surface oxide film 12 is removed, and platinum is vapor-deposited on the whole surface. A heat treatment is performed, the polycrystalline silicon and platinum are reacted with each other, and a silicide layer 18 is formed. Then, the excessive platinum is removed using aqua regia and the like, Al is vapor-deposited, and a bonding pad 19 is formed by performing a photoetching method. |
