| 摘要 |
PURPOSE:To attain the control the guarantee data transmission at a speed lower than the transmission speed by transmitting continuously twice a data of an (N+1)-bit having even/odd parity different from even/odd parity as a delimiter of a signal frame. CONSTITUTION:A transmission data is stored to a transmission buffer 11 at each N-bit, and the N-bit out of (N+1)-bit of a delimiter is set to a register 12. An N-bit output of a selector 13 is fed to a shift register 15 and a parity generator 14 of parallel input, and generates an even parity or an odd parity depending on the level of a control signal 101. A reception data is fed to a shift register 25 of 2(N+1)-bit via a receiver 26 in a receiver 2 and when the parallel output of a shift register 25 is decoded and the pattern supplied to the delimiter is detected, the reset signal is fed to a timing circuit 23. |
