| 摘要 |
PURPOSE:To prevent a bus line from entering a floating state by providing transmission gates which operate reversely to respective transmission gates correspondingly, connecting the respective transmission gates in series, and connecting one terminal of the array to a low or high potential and the other terminal to the bus line. CONSTITUTION:For example, one of control signals A, B, and C are held at ''H'' and others are held at ''L'', and one of data of memory parts 2a-2c is outputted. In this case, one of nMOS-Trs 6a-6c connected in series which corresponds to the control signal held at ''H'' turns off, and others turn off, so this Tr array is put in the floating state when viewed from the bus line 1. Further, when all the control signals are held at ''L'' and all of the transmission gates 3a-3c are turned off, all of the Trs 6a-6c turn off, so the bus line 1 is grounded through this Tr array and the bus line 1 never enters the floating state. Therefore, the bus line never enters the floating state in any case and a through current is prevented from flowing through an inverter 5. |
