| 摘要 |
PURPOSE:To form a time-division multiple time switch memory circuit and a time switch control memory circuit economically, and reduce the delay of transmission time in an exchange by providing a time switch which interchange of multiplex communication service which has a wide speed range uniformly in mixed packet form. CONSTITUTION:A time switch control memory circuit T is stored with speech information of input channels successively from the starting address in the order of speech information addressed to an exchange switch module #1 (to a node #1), speech information addressed to #2..., and when there are (n) pieces of speech information addressed to the exchange switch module #1 in the time, they are arrayed among them in the order of channels CH1...CHn. The contents are read out from the starting address in the next frame of writing at a speed matching with transmission speed of a loop side, and an addresses module address DA and an originating exchange switch module address SA are added to every series of speech information groups addressed to the same exchange switch module to form a mixed packet. |
