| 摘要 |
PURPOSE:To prevent the breakdown of a system due to a fact that an input/output controller occupies continuously a bus by inhibiting forcibly the bus occupation right to the input/output controller when a timer provided to a DMA circuit which transfers data asynchronously with an RAM has time-up. CONSTITUTION:A CPU2, an RAM3, a controller 4 of a floppy disk 5, etc. are connected to a common BUS and also connected in a daisy chain to a control line CN of a bus arbiter 1. Thus an upper bus requester can have the priority to occupy a bus. A floppy disk controller includes a DMA circuit opposite to a microprocessor CPU and a timer PTM for processing of information. When the BUS is occupied for DMA with the RAM3, the timer starts. If the transfer of data is through as prescribed, the timer is reset to disuse the BUS occupation right. In case the BUS occupation continues until the timer has time-up by some reason, the BUS occupation right is forcibly disused. This prevents the breakdown of a system.
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