发明名称 PROCESSING SYSTEM IN ERROR OCCURRENCE
摘要 PURPOSE:To match continuously an FF for error control and an FF for error display with each other by supplying the output of a checking circuit to the FF for error control and also supplying it directly to the FF for error display. CONSTITUTION:The FF3 for error display and the FF4 for error control are both reset. The checking circuit 2 outputs an error signal with logic 1 when detecting error occurrence. When a signal CLOFF has logic 0, a clock signal CLKA is generated. This signal sets the error signal with a logic 1 to the FF3 for error display and also sets the error control FF4 at the same time. When the FF4 is set, a signal ERR1 has logic 1 and the signal CLKA is ceased, so that the contents of a register 1 shows the error occurrence continuously.
申请公布号 JPS59123949(A) 申请公布日期 1984.07.17
申请号 JP19820232784 申请日期 1982.12.29
申请人 FUJITSU KK 发明人 KUBOU KATSUMI;AOKI TAKASHI
分类号 G06F11/32;G06F11/00;G06F11/07 主分类号 G06F11/32
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