发明名称 IDLE TIME SLOT SEIZURE AND TRANSMISSION FACILITIES FOR LOOP COMMUNICATION SYSTEM
摘要 <p>IDLE TIME SLOT SEIZURE AND TRANSMISSION FACILITIES FOR LOOP COMMUNICATION SYSTEM A time division multiplex loop communication system for voice and data is disclosed with multiaccess time slot seizure and data transmission capability from all station nodes without changing the idle, nonreserved, status of the seized time slot. Station node apparatus sends bursty data packets from a node when a time slot is not busy serving a longer duration voice telephone call. The apparatus eliminates the need for inefficient time slot request, acknowledgment and reservation procedures which require several TDM frames to complete and which are typically longer in duration than the bursty data packet to be transmitted. All stations have access to all time slots for bursty data transmission under control of loop interface circuitry which statistically ensures the successful data transmission from all sending nodes. The interface circuitry includes input and output buffers, slot and bit identification circuitry, bit stream retard circuitry, output selector circuitry, bypass decision circuitry, and data and voice insertion control circuitry comprising a slot decision control circuit, a seizure timing circuit and an acknowledgement check circuit.</p>
申请公布号 CA1168770(A) 申请公布日期 1984.06.05
申请号 CA19820406714 申请日期 1982.07.06
申请人 WESTERN ELECTRIC COMPANY, INCORPORATED 发明人 TORNG, HWA C.
分类号 H04J3/00;H04J3/17;H04L5/22;H04L12/43;H04L12/64;H04M9/02;H04M11/06;H04Q11/04;(IPC1-7):H04J3/02 主分类号 H04J3/00
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