发明名称 HIERARCHICAL ARITHMETIC SYSTEM
摘要 PURPOSE:To solve a register conflict in its early stage and to improve a processing speed by reading stored input data immediately and using the arithmetic result of said data for the processing of succeeding instructions. CONSTITUTION:A pipeline type computer equipped with an operand buffer 20 for storing data until the starting of arithmetic execution by an arithmetic unit 14 has a preceding operating device 29 which performs arithmetic independently of the unit 14. Once decoded information on an instruction to be executed and operand data are stored in the buffer 20 without reference to whether the unit 14 is occupied or not, the data is read out immediately and inputted to the operating device 29 to perform arithmetic. Then, the arithmetic result is used for the processing of succeeding instructions.
申请公布号 JPS5896346(A) 申请公布日期 1983.06.08
申请号 JP19810194002 申请日期 1981.12.02
申请人 HITACHI SEISAKUSHO KK 发明人 SHINTANI YOUICHI;WADA KENICHI;SHIMIZU TSUGUO;YAMAOKA AKIRA
分类号 G06F7/00;G06F9/38 主分类号 G06F7/00
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