发明名称 DATA PROCESSOR
摘要 PURPOSE:To improve the transfer throughout, by dividing a queue register group into two with a data transfer system using the queue register group, and performing point control independently. CONSTITUTION:Queue registers 20, 21 and queue registers 22, 23 are respectively taken as the 1st and 2nd groups; that is, the queue registers are divided into two on the logical architecture. An input pointer 13 indicates to which group the data from the input data line 1 is to be set. An input pointer 14 for the 1st group, and an input pointer 15 for the 2nd group produce a set signal of the registers 20-23 with the output decoded at each group. Each of an output pointer 34 for the 1st group, an output pointer 35 for the 2nd group and an output pointer 33 indicating which group is to be selected, performs selection control of selectors 36-38. The output data is transmitted to a request processing section 4.
申请公布号 JPS5876949(A) 申请公布日期 1983.05.10
申请号 JP19810173861 申请日期 1981.10.30
申请人 HITACHI SEISAKUSHO KK 发明人 YAMADA NAOKI;SHIBATA AKIO
分类号 G06F9/46;(IPC1-7):06F9/46 主分类号 G06F9/46
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