发明名称 MEMORY CIRCUIT AND VARIABLE RESISTANCE ELEMENT
摘要 PURPOSE:To enhance the electric characteristics as well as to reduce the occupied area by forming the high resistance, the PNP transistor, the diode and others into a body. CONSTITUTION:The N<+>-type buried region is formed selectively through diffusion on the surface of P-type Si substrate 1, and then the epitaxial layer is grown on the entire surface to form the Si3N4 anti-oxidizing mask featuring a fixed pattern. Then the thick SiO2 film is grown selectively through the heat treatment in an oxidizing atmosphere, and the Si3N4 film is removed to cause thin SiO2 film there. After this, p<+>-type region 5 and 6 are formed through diffusion with the photo resist film containing the opening used as the mask, and the resist film is removed to form P<->-type high resistance region 10 through diffusion which continues to region 5 and 6 within the epitaxial layer between region 5 and 6. Then the SiO2 film formed by the CVD method is coated with the aperture drilled to form N<+>-type collector contact region 7'. Furthermore, the N-type impurity is diffused on the surface of region 5 to form N<+>-type emitter region 8 and 9 at part of the region.
申请公布号 JPS54100273(A) 申请公布日期 1979.08.07
申请号 JP19780006212 申请日期 1978.01.25
申请人 HITACHI LTD 发明人 HOTSUTA ATSUO;KATOU YUKIO
分类号 G11C11/411;H01L21/331;H01L21/822;H01L21/8222;H01L21/8229;H01L27/04;H01L27/082;H01L27/10;H01L27/102;H01L29/73 主分类号 G11C11/411
代理机构 代理人
主权项
地址