| 摘要 |
PURPOSE:To set easily the timing for decision of the time distribution which is needed to fix a writing address, by providing a function to shift and write data in the order of input when the data are written on an exchange switch memory. CONSTITUTION:The write data of the 1st channel emerges at WD1-8 when data are written on a memory. Thus all memory elements M1.1-Mn.8 are set under a writing-enable state by the input of a clock WCP synchronized with said write data. Then the data of the 1st channel are written on those memory elements. Then the write data of the 2nd channel emerge at WD1-8 and the clock WCP is supplied. Thus the elements M1.1-Mn.8 are set again under a writing enable state, and the data of the 1st channel written previously on those memory elements are shifted to adjacent memories Mn-1.1-Mn-1.8. Thus the data of the 2nd channel are written newly on the elements Mn.1-Mn.8. Hereafter, the same procedure is repeated until the write data of the n-th channel emerges. Finally the data of the n-th, (n-1)-th and 1st channels are written on memory elements Mn.1-Mn.8, Mn-1.1-Mn-1.8 and M1.1-M1.8 respectively. |
