发明名称 METHOD AND APPARATUS FOR MANAGING INSTRUCTION FLUSHING IN A MICROPROCESSOR'S INSTRUCTION PIPELINE
摘要 In one or more embodiments, a processor includes one or more circuits to flush instructions from an instruction pipeline on a selective basis responsive to detecting a branch misprediction, such that those instructions marked as being dependent on the branch instruction associated with the branch misprediction are flushed. Thus, the one or more circuits may be configured to mark instructions fetched into the processor's instruction pipeline(s) to indicate their branch prediction dependencies, directly or indirectly detect incorrect branch predictions, and directly or indirectly flush instructions in the instruction pipeline(s) that are marked as being dependent on an incorrect branch prediction.
申请公布号 WO2006135590(A2) 申请公布日期 2006.12.21
申请号 WO2006US21617 申请日期 2006.06.02
申请人 QUALCOMM INCORPORATED;MCILVAINE, MICHAEL SCOTT;DIEFFENDERFER, JAMES NORRIS;SARTORIUS, THOMAS ANDREW 发明人 MCILVAINE, MICHAEL SCOTT;DIEFFENDERFER, JAMES NORRIS;SARTORIUS, THOMAS ANDREW
分类号 G06F9/44 主分类号 G06F9/44
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