Vertical chip interconnection production

摘要

A method of producing a vertical chip connection involves (a) applying a passivation layer (3a) onto a first chip (1, 2) to cover the upper face bearing contact pads; (b) bonding a surface of a second chip (5, 6) onto the first chip upper face by means of a bonding layer (4) and providing the second chip with openings which connect this second chip surface with its opposite surface in the region of the contact pads of the first chip; (c) locally removing the bonding layer material using these openings; (d) cleaning the inner surfaces of the openings with a medium, which allows subsequent adherent deposition of a dielectric, and then depositing dielectric in the openings; (e) partially removing the dielectric to leave spacer layers (8) on the vertical inner surfaces, thus forming new openings (7a); (f) locally removing the passivation layer, using the new openings (7a), to expose the contact pads; and (g) introducing electrically conductive connection material into the new openings. Preferably, the bonding layer (4) is of polyimide.