发明名称 One Time Programmable Memory with a Twin Gate Structure
摘要 A one-time programmable memory (OTP) is provided that includes a combined word line programming line (WL-PL). The OTP includes a programmable transistor having a first threshold voltage and a first breakdown voltage, and a pass transistor having a second threshold voltage and a second breakdown voltage. The combined WL-PL is electrically connected to respective gate electrodes of both the programmable transistor and the pass transistor so that both receive the same control voltage. The second gate electrode has a work function that is greater than that of the first gate electrode, so that the second gate breakdown voltage is greater than the first gate breakdown voltage, which enables the use of the combined WL-PL.
申请公布号 US2017005103(A1) 申请公布日期 2017.01.05
申请号 US201514871792 申请日期 2015.09.30
申请人 Broadcom Corporation 发明人 ZHANG Qintao;XUE Mei;YANG Wenwei;ITO Akira
分类号 H01L27/112;G11C17/18;G11C17/16 主分类号 H01L27/112
代理机构 代理人
主权项 1. A one-time programmable (OTP) memory, comprising: a programmable transistor having a first threshold voltage and a first breakdown voltage, the programmable transistor comprising a first source region, a first drain region, and a first gate electrode; a pass transistor having a second threshold voltage and a second breakdown voltage, the pass transistor comprising a second source region, a second drain region, and a second gate electrode; and a combined word line programming line (WL-PL) electrically connected to the first gate electrode and the second gate electrode, wherein the first source region is electrically connected to the second drain region and the second source region is electrically connected to a bit line, and wherein a first work function of the first gate electrode is less than a second work function of the second gate electrode.
地址 Irvine CA US