发明名称 A/D CONVERTER CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 An analog-to-digital converter circuit having a simple design and capable of preventing an increase in surface area and other problems. An analog-to-digital converter circuit for converting an analog input signal to a digital quantity includes an analog-to-digital converter unit that converts analog input signals to pre-correction digital values, and a corrector unit that digitally corrects the pre-connection digital values output from the analog-to-digital converter unit. The corrector unit includes a weighting coefficient multiplier unit that outputs a post-correction digital value obtained by multiplying the weighting coefficients provided for each bit by each bit of the pre-correction digital value output from the A/D converter unit and summing them, and a weighting coefficient search unit that searches for weighting coefficients so as to minimize an error signal generated based on the post-correction digital value and an approximate value for the post-correction digital value.
申请公布号 US2015188555(A1) 申请公布日期 2015.07.02
申请号 US201414579049 申请日期 2014.12.22
申请人 RENESAS ELECTRONICS CORPORATION 发明人 KIMURA Keisuke;OKUDA Yuichi;NAKANE Hideo;YAMAMOTO Takaya
分类号 H03M1/06;H03M1/44;H03M1/00 主分类号 H03M1/06
代理机构 代理人
主权项 1. An analog-to-digital converter circuit that converts an analog input signal into a digital quantity comprising: an analog-to-digital converter unit that converts the analog input signal into a pre-correction digital value; and a corrector unit that digitally corrects the pre-correction digital value output from the analog-to-digital converter unit, wherein the corrector unit includes: a weighting coefficient multiplier unit that outputs a post-correction digital value obtained by multiplying the weighting coefficients provided for each bit by each bit of the pre-correction digital value output from the analog-to-digital converter unit and summing them, and a weighting coefficient search unit that searches for weighting coefficients so as to minimize an error signal generated based on the post-correction digital value and an approximate value for the post-correction digital value.
地址 Kanagawa JP