发明名称 RESISTANCE-CHANGE MEMORY
摘要 According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the second electrode. The control circuit applies a voltage between the first electrode and the second electrode to perform writing, erasing, and reading. During the writing, the control circuit applies a first voltage pulse between the first electrode and the second electrode, and then applies a second voltage pulse different in polarity from the first voltage pulse after applying the first voltage pulse.
申请公布号 US2015155035(A1) 申请公布日期 2015.06.04
申请号 US201514621071 申请日期 2015.02.12
申请人 Kabushiki Kaisha Toshiba 发明人 ICHIHARA Reika;MATSUSHITA Daisuke;FUJII Shosuke
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项 1. A resistance-change memory comprising: first and second electrodes; a variable resistance layer disposed between the first electrode and the second electrode; and a control circuit which applies a voltage between the first electrode and the second electrode, wherein the variable resistance layer can enter into one of an on-state, an off-state, and an intermediate state, a resistance of the off-state being greater than a resistance of the on-state, a resistance of the intermediate state being greater than the resistance of the on-state, and the variable resistance layer makes transitions to the on-state when the control circuit applies a first voltage pulse, the variable resistance layer in the on-state transitions to the intermediate state when the control circuit applies a second voltage pulse different in polarity from the first voltage pulse, the variable resistance layer in the intermediate state transitions to the off-state when the control circuit applies a third voltage pulse, at least one of pulse amplitude or pulse width of the third voltage pulse being greater than that of the second voltage pulse, and the variable resistance layer in the intermediate state transitions to the on-state when the control circuit applies a fourth voltage pulse, a product of pulse amplitude and pulse width of the fourth voltage pulse being smaller than that of the first voltage pulse, wherein, during the read operation, the control circuit applies the fourth voltage pulse, and then applies the second voltage pulse.
地址 Minato-ku JP