发明名称 |
Method of manufacturing nonvolatile semiconductor memory device |
摘要 |
According to one embodiment, a method includes forming a gate insulating layer structure covering first and second stacked layer structures, forming a first conductive layer on the gate insulating layer structure, forming a sacrifice layer on the first conductive layer, patterning the first conductive layer and the sacrifice layer with a line & space pattern, filling an insulating layer in spaces of the line & space pattern, the insulating layer having an etching characteristic different from the sacrifice layer, forming trenches in lines of the line & space pattern by removing the sacrifice layer selectively, the trenches exposing the first conductive layer between the first and second stacked layer structures, and forming a second conductive layer on the first conductive layer in the trenches. |
申请公布号 |
US8987088(B2) |
申请公布日期 |
2015.03.24 |
申请号 |
US201314043134 |
申请日期 |
2013.10.01 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Sakuma Kiwamu |
分类号 |
H01L21/336;H01L29/66;H01L21/28;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/336 |
代理机构 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A method of manufacturing a nonvolatile semiconductor memory device, the method comprising:
forming first and second stacked layer structures each comprising active area layers, the active area layers stacked in a first direction and extending in a second direction which intersects with the first direction, the first and second stacked layer structures arranged in a third direction which intersects with the first and second directions; forming a gate insulating layer structure covering the first and second stacked layer structures; forming a first conductive layer on the gate insulating layer structure, a space between the first and second stacked layer structures not filled with the first conductive layer; forming a sacrifice layer on the first conductive layer, the space between the first and second stacked layer structures filled with the sacrifice layer; patterning the first conductive layer and the sacrifice layer with a line & space pattern comprising lines and spaces extending in the third direction; filling an insulating layer in the spaces of the line & space pattern, the insulating layer having an etching characteristic different from the sacrifice layer; forming trenches in the lines of the line & space pattern by removing the sacrifice layer selectively, the trenches exposing the first conductive layer between the first and second stacked layer structures; and forming a second conductive layer on the first conductive layer in the trenches. |
地址 |
Minato-ku JP |