| 摘要 |
A method and apparatus of primary side output voltage sensing for a flyback power converter preserves secondary-side tranformer isolation without the use of opto-isolators and does not require multiple high-speed sample and hold circuits. A timing circuit measures the duration of the diode conduction interval during a first PWM control cycle and applies this measurement to set the voltage sampling time of the feedback loop during the next PWM cycle. The voltage sampling time for the next PWM cycle is configurable and may be set to occur near the middle of the diode conduction interval or near the end of the diode conduction interval. The cycle-to-cycle PWM duty cycle adjustment step size may be limited to ensure that the diode conduction interval does not vary substantially from cycle to cycle. |
