发明名称 |
High-speed add-compare-select (ACS) circuit |
摘要 |
A high speed add-compare-select (ACS) circuit for a Viterbi decoder or a turbo decoder has a lower critical path delay than that achievable using a traditional ACS circuit. According to one embodiment of the invention, the path and branch metrics are split into most-significant and least-significant portions, such portions separately added in order to reduce the propagation delay. |
申请公布号 |
US8205145(B2) |
申请公布日期 |
2012.06.19 |
申请号 |
US20080265011 |
申请日期 |
2008.11.05 |
申请人 |
LEE SEOK-JUN;ZHU YUMING;GOEL MANISH;TEXAS INSTRUMENTS INCORPORATED |
发明人 |
LEE SEOK-JUN;ZHU YUMING;GOEL MANISH |
分类号 |
H03M13/00 |
主分类号 |
H03M13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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