发明名称 METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE
摘要 PURPOSE: A semiconductor package manufacturing method is provided to reduce the thickness of a semiconductor package by reducing the height of a wire loop. CONSTITUTION: A semiconductor chip(200) is attached to a substrate in which a connection pad is formed. A wire fixing member(400) for exposing a bonding pad is formed on one surface and a side surface of the semiconductor chip. One end part and another end part of a solder wire(500) are respectively attached to the bonding pad and the connection pad. A mold member(600) for sealing the upper surface of the substrate which includes the solder wire and the semiconductor chip is formed. The connection pad, the bonding pad, and the solder wire are electrically connected by performing a reflow process of the solder wire.
申请公布号 KR20120031691(A) 申请公布日期 2012.04.04
申请号 KR20100093225 申请日期 2010.09.27
申请人 SK HYNIX INC. 发明人 CHOI, JAE YOUN;JUNG, JONG SEO;LEE, CHAN SUN;KIM, MYUNG HUN
分类号 H01L23/48;H01L21/60 主分类号 H01L23/48
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