发明名称 |
Pixel or column fixed pattern noise mitigation using partial or full frame correction |
摘要 |
Systems and methods are provided that facilitate mitigating pixel or column fixed pattern noise in a CMOS imaging System-on-Chip (iSoC) sensor. Pixel or column fixed pattern noise can be recognized by gating a pixel array without firing a transfer signal (TX). Inhibiting the transfer signal can cause zero input to be provided to pixels in the pixel array; thus, the sampled output from the pixels under such conditions can be a function of noise. Calibration and correction can thereafter be effectuated. Additionally or alternatively, pixel or column fixed pattern noise can be managed by controlling a frame rate; thus, the frame rate can be reduced under low light conditions to enable integrating incident light for longer periods of time as well as providing reference frames of pixels generated from zero input that can be utilized for calibration and correction of pixel or column fixed pattern noise associated with other frames.
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申请公布号 |
US8068152(B2) |
申请公布日期 |
2011.11.29 |
申请号 |
US20080163159 |
申请日期 |
2008.06.27 |
申请人 |
BLANQUART LAURENT;ALTASENS, INC. |
发明人 |
BLANQUART LAURENT |
分类号 |
H04N5/217;H04N5/228;H04N5/365;H04N5/374;H04N9/64 |
主分类号 |
H04N5/217 |
代理机构 |
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代理人 |
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地址 |
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