发明名称 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF |
摘要 |
An object is to realize low power consumption while manufacturing a semiconductor device including a thin film transistor whose parasitic capacitance is reduced. Part of an insulating layer covering the periphery of a gate electrode layer is formed to be thick. Specifically, a stack including a spacer insulating layer and a gate insulating layer is formed. The thick part of the insulating layer covering the periphery of the gate electrode layer reduces parasitic capacitance formed between the gate electrode layer of the thin film transistor and another electrode layer (another wiring layer) overlapping with the gate electrode layer.
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申请公布号 |
US2011062432(A1) |
申请公布日期 |
2011.03.17 |
申请号 |
US20100879635 |
申请日期 |
2010.09.10 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
YAMAZAKI SHUNPEI;SAKAKURA MASAYUKI;KOYAMA JUN;OIKAWA YOSHIAKI;MARUYAMA HOTAKA;JINTYOU MASAMI;OKAZAKI KENICHI |
分类号 |
H01L29/786;H01L21/44 |
主分类号 |
H01L29/786 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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