Asynchronous packet based dual port link list header and data credit management structure

摘要

An asynchronous data transfer interface is provided across a boundary that allows high bandwidth data transfers which are packet based as defined by PCI_Express architecture, and has general utility in processor-based applications like servers, desktop applications, and mobile applications. A shared set of multi-port RAM buffers allow both an application layer AL and a transaction layer TL access to a communication protocol layer in a defined process that allows both the application layer AL and the transaction layer TL to read and manage the buffers in a 16 byte boundary in a manner that allows a data credit to be decoupled from a header credit.