发明名称 REDUCED CHANNEL PITCH IN SEMICONDUCTOR DEVICE
摘要 <p>A method for multiplying the pitch of a semiconductor device is disclosed. The method includes forming a patterned mask layer on a first layer, where the patterned mask layer has a first line width. The first layer can then be etched to form a first plurality of sloped sidewalls. After removing a portion of the patterned mask so that the patterned mask layer has a second line width less than the first line width, the first layer can be etched again to form a second plurality of sloped sidewalls. The patterned mask layer can then be removed. The first layer can be etched again to form a third plurality of sloped sidewalls. The first plurality of sloped sidewalls, the second plurality of sloped sidewalls, and the third plurality of sloped sidewalls can form an array of parallel triangular channels. In one implementation, the channels are formed in the fabrication of a triangular wire channel MOSFET (300), including a plurality of parallel triangular wire channels (325), a buried oxide layer (310), a gate oxide (360), and a gate (375).</p>
申请公布号 KR20090077851(A) 申请公布日期 2009.07.15
申请号 KR20097011426 申请日期 2005.11.29
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 VENUGOPAL RAMESH;WASSHUBER CHRISTOPH
分类号 H01L29/06;H01L21/027 主分类号 H01L29/06
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