| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an integrated circuit with a power domain PD0, PD1, PD2, PD3 which can be selectively powered-up or powered-down. <P>SOLUTION: An output circuit 8 serving to buffer a signal 12 generated by a core circuit 10 within a power domain has its own output power supply voltage IOV<SB>dd</SB>. An adaptive voltage sensing circuit 24 senses when the core power supply voltage to the core circuit 10 falls below a threshold level and generates a voltage-low signal. If output signal retention has previously been selected to be active for the output signal concerned, then the output circuit 8 responds to the voltage-low signal by maintaining the output signal state (output signal driven low, output signal driven high or output signal in a high impedance state). The retention mode is previously selected by an on-shot pulse with its value stored within a mode latch 24 indicating whether or not retention is required. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
