发明名称 INSULATED GATE FET AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To avoid the deterioration of short channel characteristics which is caused by a silicon germanium layer touching the channel of a strained SOI transistor, and to provide a double-gated strained SOI transistor as well as the strained SOI transistor combined with an usual silicon or a SOI transistor on a single wafer. SOLUTION: In an insulated gate FET, for example, a strained silicon layer 5 is grown on a strain relief silicon germanium layer 4, and then the silicon germanium layer is partially removed, so as to constitute a channel layer by the strained silicon layer. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008160145(A) 申请公布日期 2008.07.10
申请号 JP20080023907 申请日期 2008.02.04
申请人 RENESAS TECHNOLOGY CORP 发明人 SUGII NOBUYUKI;ONISHI KAZUHIRO;WASHIO KATSUYOSHI
分类号 H01L29/786;H01L21/336;H01L21/76;H01L21/762;H01L21/8234;H01L27/08;H01L27/088 主分类号 H01L29/786
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