Techniques for integrated circuit clock management

摘要

A clock generator ( 622 ) includes a first circuit ( 812 ) and a second circuit ( 814 ). The first circuit ( 812 ) includes a first clock input configured to receive a first clock signal at a first frequency, a second clock input configured to receive a second clock signal at the first frequency, and an output. The second clock signal is out-of-phase with the first clock signal. The second circuit ( 814 ) is coupled to the first circuit ( 812 ) and includes a mode signal input configured to receive a mode signal. The output of the first circuit ( 812 ) is configured to provide a generated clock signal whose effective frequency is based on the first and second clock signals and the mode signal.