发明名称 SUBSTRATE AND LAYOUT METHOD
摘要 Layout methods for a substrate are disclosed. In one embodiment, the method includes: defining a first plating line on a non-conducting layer coupled to a first pad; and defining a second plating line on the first conducting layer coupled to a second pad. Along a direction away from the first pad and the second pad, a distance between the first plating line and the second plating line becomes longer. In another embodiment, the method includes: defining a plating line on a non-conducting layer, the plating line being coupled to a pad; and replacing a portion of at least a conducting layer with a non-conducting material, wherein the portion is directly under the plating line.
申请公布号 US2007277997(A1) 申请公布日期 2007.12.06
申请号 US20060421481 申请日期 2006.06.01
申请人 发明人 LIANG WEI-AN;WU CHUNG-JU;HSUEH YIN-CHIEH
分类号 H05K1/03 主分类号 H05K1/03
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