发明名称 SEMICONDUCTOR STORAGE APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor storage apparatus wherein the unevenness of effective voltages applied to variable resistance elements, which is caused by a difference in wire length due to a positional difference in a memory cell array, can be eliminated, thereby suppressing the variation in resistance characteristics of the variable resistance elements between memory cells. SOLUTION: The semiconductor storage apparatus 1 comprising a memory cell array 100 in which memory cells have a variable resistance element and the memory cells along each row are connected to a common word line, while the memory cells along each column are connected to a common bit line, wherein during a predetermined memory operation, in order to confine, within a predetermined range regardless of arrangement positions in the memory cell array 100, the effective voltage amplitude of a voltage pulse to be applied to the variable resistance element of a selected memory cell to be written or erased, the voltage amplitude of the voltage pulse to be applied to an end of at least one of a selected word line and a selected bit line is adjusted based on the arrangement position of the selected memory cell in the memory cell array 100. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007026627(A) 申请公布日期 2007.02.01
申请号 JP20050282199 申请日期 2005.09.28
申请人 SHARP CORP 发明人 TAJIRI MASAYUKI;SHIMAOKA ATSUSHI;INOUE TAKESHI
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项
地址