发明名称 |
Ofdm demodulation apparatus |
摘要 |
An OFDM demodulation ( 1 ) is provided which includes a guard correlation/peak time detection circuit ( 12 ) to generate a peak timing Np of a guard interval correlation value, and a timing synchronization circuit ( 13 ) to estimate a symbol-boundary time Nx from the peak timing Np. The timing synchronization circuit ( 13 ) calculates the symbol-boundary time Nx by filtering the peak time Np by a DLL (delay locked loop) filter ( 43 ). Further, the DLL filter ( 43 ) includes a limiter ( 52 ) to limit the range of phase-error component and an asymmetric gain circuit ( 53 ) to change the magnitude of the gain correspondingly to the polarity of the phase error to prevent the timing from being pulled out due to a fading or multipath.
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申请公布号 |
US2005147186(A1) |
申请公布日期 |
2005.07.07 |
申请号 |
US20050505794 |
申请日期 |
2005.02.18 |
申请人 |
FUNAMOTO KAZUHISA;OKADA TAKAHIRO;IKEDA TAMOTSU;YAJIMA ATSUSHI;IKEDA YASUNARI |
发明人 |
FUNAMOTO KAZUHISA;OKADA TAKAHIRO;IKEDA TAMOTSU;YAJIMA ATSUSHI;IKEDA YASUNARI |
分类号 |
H04J11/00;H04L7/08;H04L27/14;H04L27/26;(IPC1-7):H04L27/14 |
主分类号 |
H04J11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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