发明名称 DEBUGGING CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a debugging circuit capable of solving the problem of difficulty in analyzing cause, because operation of an internal circuit cannot be understood in detail, if malfunction occurs when mounting an LSI on a device board for evaluating function. <P>SOLUTION: In a conversion block 140, a plurality of internal signals which is thought to be effective for clarifying the cause of failure outputted from a selection block 120 are latched with the signal outputted from a timing generating block 130, which is converted to serial data and outputted to an output block 150. So, a plurality of signals inside an LSI can be observed with a few external pins, for quick and sure analysis of a malfunction of the LSI. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005091310(A) 申请公布日期 2005.04.07
申请号 JP20030328803 申请日期 2003.09.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 UEDA YASUSHI;OKAZAKI MAKOTO
分类号 G01R31/28;G01R31/3177;G06F11/00;G06F11/22;G06F11/28 主分类号 G01R31/28
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