发明名称 Multi-chips stacked package
摘要 A multi-chips stacked package mainly comprises a substrate, a lower chip, an upper chip, an intermediate chip, a plurality of bumps and an encapsulation. Therein, the lower chip is disposed on the substrate; the bumps connect the lower chip and the intermediate chip; the upper chip and the lower chip are electrically connected to the substrate via a plurality of first electrically conductive wires and second electrically conductive wires respectively. The bumps can support the intermediate chip more firmly, so the top of the intermediate chip can be kept in counterpoise and higher than the peak of the first wires. Accordingly, the intermediate chip will be prevented from being tilted excessively to cause the upper chip to be contacted to the first electrically conductive wires. Thus, the first electrically conductive wires can be prevented from being damaged when the upper chip is wire bonded to the substrate.
申请公布号 US2004212064(A1) 申请公布日期 2004.10.28
申请号 US20030747127 申请日期 2003.12.30
申请人 ADVANCED SEMICONDUCTOR ENGINEERING, INC. 发明人 WANG SUNG-FEI
分类号 H01L23/31;H01L25/065;(IPC1-7):H01L23/02 主分类号 H01L23/31
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