发明名称 |
Insulated gate planar integrated power device with co-integrated schottky diode and process |
摘要 |
A process for integrating a Schottky contact inside the apertures of the elementary cells that constitute the integrated structure of the insulated gate power device in a totally self-alignment manner does not requires a dedicated masking step. This overcomes the limits to the possibility of increasing the packing density of the cellular structure of the integrated power device, while permitting improved performances of the co-integrated Schottky diode under inverse polarization of the device and producing other advantages. A planar integrated insulated gate power device with high packing density of the elementary cells that compose it, having a Schottky diode electrically in parallel to the co-integrated device, is also disclosed.
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申请公布号 |
US2004164304(A1) |
申请公布日期 |
2004.08.26 |
申请号 |
US20030713778 |
申请日期 |
2003.11.14 |
申请人 |
MAGRI ANGELO;FRISINA FERRUCCIO |
发明人 |
MAGRI ANGELO;FRISINA FERRUCCIO |
分类号 |
H01L21/265;H01L21/336;H01L29/08;H01L29/78;H01L29/872;(IPC1-7):H01L29/04 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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