ADDRESS DECODER CAPABLE OF ASSIGNING ADDRESS RANGE AND HIGH-SPEED GRAPHIC PROCESSING FRAME MEMORY DEVICE USING THE SAME

摘要

PURPOSE: An address decoder capable of assigning address range and a high-speed graphic processing frame memory device using the same are provided to improve the graphic speed by using a row/column address decoder capable of performing a successive address assignment with two addresses. CONSTITUTION: A plurality of memory cells(11) are arranged in a matrix manner. A column address decoder(12) receives first and second column addresses and generates at least one column address select signal for assigning a successive column address range over at least 1 for the memory cells(11). A row address decoder(13) receives first and second row addresses and generates at least one row address select signal for assigning a successive row address range over at least 1 for the memory cells(11). A graphic data writing is performed one time for memory cell(s) selected by the successive column address and the successive row address.