发明名称 Multiplexer and demultiplexer
摘要 A word alignment mechanism of a series-parallel converter is kept away from errors when multiplexing Gigabit Ethernet signals. The errors result from K28.5 codes in the low-order 10 bits of the Gigabit Ethernet signals. The clock rates of two Gigabit Ethernet signals are adjusted by transmitting each signal via an optical transceiver, a series-parallel converter, and an elastic smoother. The K28.5 codes of only the highest order Gigabit Ethernet signal are preserved, while the K28.5 codes for all other signals are converted to different codes using a code swapper and supplied to the series-parallel converter, which outputs a multiplexed signal. When recovering the original signals from the multiplexed signal, the different codes are converted back to the K28.5 codes.
申请公布号 US2003021299(A1) 申请公布日期 2003.01.30
申请号 US20020174703 申请日期 2002.06.19
申请人 OTA TAKESHI 发明人 OTA TAKESHI
分类号 H03M7/14;H03M9/00;H04J3/00;H04J3/04;H04J3/06;H04L25/49;(IPC1-7):H04J3/04 主分类号 H03M7/14
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