发明名称 CODING ARITHMETIC CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a coding arithmetic circuit for performing respectively cyclic code and convolution code arithmetic operations that eliminates the need for preparing a shift register with the same length as a maximum order of a generation polynomial required for a system so as to reduce the circuit scale and freely set the generation polynomial. SOLUTION: The coding arithmetic circuit is provided with a generation polynomial storage means 101 that stores coefficient data of one or a plurality of generation polynomials, a shift register means 103 that comprises N-sets of latch circuits, N-sets of logic arithmetic means 104 or below that are laid out corresponding to the latch circuits, a connection changeover means 105 that can optionally switch connections among respective terminals for the latch circuits, the logic arithmetic means and an input data stream, and a connection control means 106 that controls the connection changeover means according to designation of the cyclic code and convolution code arithmetic operations and the coefficient data of the generation polynomials.
申请公布号 JP2003008449(A) 申请公布日期 2003.01.10
申请号 JP20010190097 申请日期 2001.06.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAKAGI NOBUHIRO
分类号 G06F11/10;H03M13/15;(IPC1-7):H03M13/15 主分类号 G06F11/10
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