发明名称 Method and apparatus for reducing parasitic bipolar current in a silicon-on-insulator transistor
摘要 In a method and apparatus for reducing parasitic bipolar current in an insulated body, field effect transistor ("FET"), for an n-type FET, the body of the insulated body NFET is electrically isolated, responsive to turning on the NFET. This permits a charge to accumulate on the body in connection with turning the NFET on, temporarily lowering the threshold voltage for the insulated body NFET. Responsive to turning off the insulated body NFET, at least a portion of the charge on the body is discharged. This discharging of the body reduces parasitic bipolar current which would otherwise occur upon turning the NFET back on if the body had charged up during the time when the NFET was off. For a p-type FET that is susceptible to parasitic bipolar current, the body is discharged responsive to turning off the PFET, and isolated responsive to turning on the PFET.
申请公布号 US6281737(B1) 申请公布日期 2001.08.28
申请号 US19980196907 申请日期 1998.11.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KUANG JENTE BENEDICT;LU PONG-FEI;SACCAMANGO MARY JOSEPH
分类号 H01L21/328;H03K17/16;H03K19/00;H03K19/003;(IPC1-7):H03K17/16;H03K17/30 主分类号 H01L21/328
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