发明名称 Test method and device for a semiconductor integrated circuit
摘要 <p>A semiconductor integrated circuit comprises a first circuit block constituting an input circuit, a second circuit block constituted of a predetermined function block, a third circuit block constituting an output circuit. The first, second and third circuit blocks are cascade-connected in a normal operation. A testing additional circuit for performing a function test for the second circuit block, is provided only at an input side of the second circuit block, and the second circuit block is connected directly to the third circuit block through only interconnections with neither a logic gate nor a multiplexor. &lt;IMAGE&gt;</p>
申请公布号 EP0939320(A2) 申请公布日期 1999.09.01
申请号 EP19990100078 申请日期 1999.01.05
申请人 NEC CORPORATION 发明人 KUDO, KAZUYA
分类号 G01R31/28;G01R31/3185;G06F11/22;H01L21/822;H01L27/04;(IPC1-7):G01R31/318 主分类号 G01R31/28
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