VOLTAGE STEP-UP FOR A LOW VOLTAGE FREQUENCY SYNTHESIZER ARCHITECTURE

摘要

When reducing battery cells in cellular phones, the frequency synthesizer or phase locked loop located in the receiver of a phone, due to a resulting increase in gain, outputs more noise. In order to reduce the noise this system includes a voltage step-up device (510) which effectively increases the voltage range of the voltage controlled oscillator (110) located in the frequency synthesizer. To further reduce the noise the voltage step-up unit is employed with passive elements thus reducing the noise further and optimizing the output of the phase locked loop. Several different designs are discussed to further reduce space requirements and increase programmability of the system. In particular, the voltage step-up unit (510) multiplies a supply voltage input to a charge pump (125) by a predefined value, the charge pump applying an input voltage to the voltage controlled oscillator (110) via a loop filter (120). In one embodiment the voltage step-up unit (510) is responsive to a clocking signal obtained by dividing a reference frequency signal of the phase locked loop.