发明名称
摘要 PURPOSE:To reduce a thermal resistance by a method wherein a contact hole reaches an insulating layer under a semiconductor layer and an electrode conductor film is brought into contact with the insulating layer in the contact hole. CONSTITUTION:A whole MOS-FET is covered with a silicon oxide film 15. The silicon oxide film 15, a high impurity concentration diffused layer 13 and an insulating layer 11 are partially removed at the parts of the contact holes 22 and electrode conductor films 16 such as W films are buried in the contact holes 22. The side surfaces and bottom surfaces of the electrode conductor films 16 are brought into contact with the insulating layer 11 and Al films 17 are connected to the top surfaces of the electrode conductor films 16 to provide interconnection. It is desirable to have the thickness of the insulating film 11 remaining under the bottom of the contact hole as small as possible but, taking the variation of the film thickness and etching into account, the thickness about 0.5 microns is recommended. In a semiconductor integrated circuit having an SOI structure, heat generated in a transistor region can be discharged easily into a silicon substrate 10 through the contact hole part. As the thickness of the insulating layer 11 under the contact hole is 1/4 of the film thickness of a conventional constitution, the thermal resistance can be also about 1/4.
申请公布号 JP2776149(B2) 申请公布日期 1998.07.16
申请号 JP19920154886 申请日期 1992.06.15
申请人 NIPPON DENKI KK 发明人 KUROSAWA SUSUMU
分类号 H01L23/522;H01L21/768;H01L29/40;H01L29/78;H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L23/522
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