发明名称 |
Combined frequency and phase regulation loop, esp. for gigabit signals |
摘要 |
The regulation loop has a phase detector, a low-pass filter and a voltage-controlled oscillator (VCO). An additional comparator stage (OP2) compares the output signal of the low-pass filter or the phase discriminator in the phase regulating loop with a reference voltage, to provide a control signal for the voltage-controlled oscillator. Pref. the output of the comparator stage is fed to the input of a window comparator (FK), the output of which is fed to the input of the low-pass filter in the phase regulating loop.
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申请公布号 |
DE19523186(A1) |
申请公布日期 |
1997.01.02 |
申请号 |
DE19951023186 |
申请日期 |
1995.06.26 |
申请人 |
SIEMENS AG, 80333 MUENCHEN, DE |
发明人 |
ZIRWAS, WOLFGANG, DIPL.-ING., 82194 GROEBENZELL, DE |
分类号 |
H03L7/093;H03L7/10;H03L7/113;H04J3/04;H04L7/033;(IPC1-7):H03L7/06;H04L25/40 |
主分类号 |
H03L7/093 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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