发明名称 REDUNDANCY CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE
摘要 A redundancy circuit for a semiconductor memory device has a first switching element composed of a nonvolatile memory cell and a second switching element composed of a data writtable and erasable element such as an EPROM. The circuit further has a test mode setting circuit which outputs an operation mode setting signal based on a signal inputted to a test terminal, and a switching element control circuit which controls the selection of the first and/or second switching elements based on the operation mode setting signal. A NOR circuit outputs a switching-signal as an output signal when switching data is written into at least one of the first and second switching elements. The switching data can be temporarily written into the second switching element even after assembly into the product has been completed, so that various kinds of inspections with the use of the redundancy circuit are possible.
申请公布号 KR960002011(B1) 申请公布日期 1996.02.09
申请号 KR19920007108 申请日期 1992.04.27
申请人 NIPPON ELECTRIC K.K. 发明人 GATO, YASUSHI
分类号 G11C29/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C29/00
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