CIRCUIT ARRANGEMENT OF DRIVING CIRCUIT FOR BUSES WITH DATA ENCODING AND WITH A SINGLE-PHASE CONTROL,申请号CS19890005448-传众专利搜索

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发明名称	CIRCUIT ARRANGEMENT OF DRIVING CIRCUIT FOR BUSES WITH DATA ENCODING AND WITH A SINGLE-PHASE CONTROL
摘要	<p>Zapojení obsahuje obvod (1) vstupní logiky s datovým a hodinovým vstupem (11, 12), čtyři časovací obvody (2, 3, 4, 5), z nichž první a třetí mají blokovací vstupy (22, 42) a obvod (6) výstupní logiky se dvěma výstupy (65, 66). První výstup (13) obvodu (1) vstupní logiky je připojen k prvnímu vstupu (21) prvního časovacího obvodu (2) a druhý výstup (14) k prvnímu vstupu (41) třetího časovacího obvodu (4). Výstup (23) prvního časovacího obvodu (2) je připojen jednak k druhému vstupu (62) obvodu (6) výstupní logiky, jednak ke vstupu (31) druhého časovacího obvodu (3), jehož výstup (32) je připojen k prvnímu vstupu (61) obvodu (6) výstupní logiky. Výstup (43) třetího časovacího obvodu je připojen jednak ke třetímu vstupu (63) obvodu (6) výstupní logiky, jednak ke vstupu (51) čtvrtého časovacího obvodu (5), jehož výstup (52) je připojen ke čtvrtému vstupu (64) obvodu (6) výstupní logiky.ŕ</p>
申请公布号	CZ280105(B6)	申请公布日期	1995.10.18
申请号	CS19890005448	申请日期	1989.09.25
申请人	TESLA PARDUBICE	发明人	ZNAMENACEK MILAN ING.;POCHOBRADSKY JAN ING.
分类号	G06F13/16;G06F13/38;(IPC1-7):G06F13/16	主分类号	G06F13/16
代理机构		代理人
主权项
地址

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