| 摘要 |
<p>PURPOSE: To manufacture a planar type high-temperature superconducting integrated circuit by using ion implantation by providing a substrate, a first HTS layer, a second HTS, i.e., dielectric/contact layer and a third HTS layer. CONSTITUTION: A first HTS layer 58 may be, for example, first adhered and patterned by using photolithography. Regions 62, 64 of the layer 58 are exposed by using ion implantation, superconducting characteristic of the regions 62, 64 are altered, while non-alternating HTS region 60 retains the superconducting characteristics. A second HTS layer 68 can be adhered and patterned by using photolithography. Regions 70, 71 are exposed by using ion implantation, superconducting characteristic of the regions 70, 71 are altered, while a non- altering region 69 retains the superconducting characteristic. Then, a third HTS layer 72 is adhered and patterned on a dielectic/contact layer 68, thereby completing an HTS integrated circuit 50.</p> |
