发明名称 |
Semiconductor memory device including redundant memory cell array for repairing defect |
摘要 |
An SRAM disclosed herein includes 64 memory cell array blocks and a redundant memory cell array block. The redundant memory cell array includes a total of 16 redundant memory cell columns. A defect address indicating a location of a defective memory column is programmed in an address programming circuit, and the specific defecting column in the defect address is programmed in an I/O programming circuit. Although each memory cell does not include a spare memory cell column or row for redundancy, the defect can be repaired by using a redundant memory cell array, so that the high integration of the SRAM can be accomplished. |
申请公布号 |
US5416740(A) |
申请公布日期 |
1995.05.16 |
申请号 |
US19920987757 |
申请日期 |
1992.12.09 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
FUJITA, KOREAKI;YAMASHITA, MASAYUKI;SHIMASAKI, MASAMITSU |
分类号 |
G11C11/413;G11C11/401;G11C29/00;G11C29/04;G11C29/44;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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