| 摘要 |
A graphics coprocessor adapter with hardware support for horizontal scrolling is disclosed. A graphics processor provides both a row address with a RAS signal and a column address with a CAS signal to two banks of video RAMs. Both banks are provided with the same scrolling column address signal. Translating logic intercepts the column address signal for the static plane RAM bank and translates it into a fixed value. Thus, a single column address signal can control both the scrolling and static planes. <IMAGE> |
