发明名称 |
PCM TERMINAL EQUIPMENT WITH FRAME ALIGNER CIRCUIT AND FRAME ALIGNING METHOD |
摘要 |
PURPOSE:To suppress the phase difference error less than a fixed level between the writing input frame signal which secures the matching of synchronization of frame phases and a reading frame signal used in a PCM end office device. CONSTITUTION:A window pulse 81 which becomes active with the prescribed fixed data on the address signal 71 of a counter circuit 7 is generated from this signal 71 which is counted by an internal clock 41 used in a PCM end office device for production of a reading frame signal applied to a frame aligner circuit 9. Then the phase difference between an input signal 2 serving as a multiplex signal applied to a built-in memory of the circuit 9 and a writing input frame signal 3 is monitored together with the pulse 81. If the phase difference is delayed so much to exceed the active period of the pulse 81, the circuit 7 is reset to correct the phase delay of the signal 3 to a reading frame signal 101. |
申请公布号 |
JPH0575561(A) |
申请公布日期 |
1993.03.26 |
申请号 |
JP19910236084 |
申请日期 |
1991.09.17 |
申请人 |
NEC CORP;NEC MIYAGI LTD |
发明人 |
SHIMADA YOSHITAKA;SUGAWARA NOBUKI |
分类号 |
H04J3/06;H04L7/08;H04Q11/04 |
主分类号 |
H04J3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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