| 摘要 |
PURPOSE:To obtain a high-speed level converting circuit, by driving the single- end push-pull output circuit, which receives signals having phases opposite to each other, by the output of the differential transistor circuit which receives the ECL (emitter coupled logic) level. CONSTITUTION:+5V and -5.2V voltages are given to terminals P1 and P7 respectively. When ECL signal A at terminal P4 is ''L'', transistors Q13 and Q14 are turned on and off respectively. At this time, since the current of constant-current transistor Q15 is flowed to resistance R19, the potential of node N1 is lowered, and transistors Q18 and Q19 are turned off. At this time, since the potential of node N2 is high, transistors Q16 and Q17 are turned on, and the ''H'' level is output to output terminal P2. When the ECL level becomes ''H'', transistors Q14 and Q13 are turned on and off respectively, and therefore, transistors Q18 and Q19 are turned on, and the ''L'' level is outputted to output terminal P2. |
