发明名称 ZERO DECISION DEVICE FOR DATA
摘要 PURPOSE:To offer the zero decision device which is so constituted as to make a zero decision by only one process as to a device which makes a zero decision on data whose bit length is larger than the number of process bits of a mathematical logical arithmetic circuit. CONSTITUTION:The zero decision device for data is equipped with the mathematical logical arithmetic circuit 1 which has two (n)-bit input terminals, where (n) is a positive integer larger than 1, and a zero decision circuit which decides whether or not the output data terminals of the arithmetic circuit 1 are all '0'. Then (n)-bit data is inputted to an input terminal of the mathematical logical arithmetic circuit which is controlled into an OR operable state and the zero decision circuit 5 decides the data at the output terminal of the arithmetic circuit.
申请公布号 JPH04283828(A) 申请公布日期 1992.10.08
申请号 JP19910072575 申请日期 1991.03.12
申请人 FUJITSU LTD 发明人 IIZUKA HAJIME
分类号 G06F7/00;G06F7/38 主分类号 G06F7/00
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