| 摘要 |
<p>A reference delay generator includes a delay unit (VCD) having a plurality of delay elements (E) which are cascaded and respectively have variable delay times. The delay unit receives a reference signal (ECK) and generates a delayed signal (DCK) which is a delayed version of the reference signal. A control part (PDD, CT; PLL) detects a phase difference between the reference signal and the delayed signal and generates a control signal (Vc) which sets the phase difference to an integer multiple of 90 DEG . The control signal is applied to the delay elements, so that the delay times of the delay elements are changed on the basis of the control signal. The control signal is used for, for example, controlling a delay circuit (DLC) which includes a plurality of delay elements identical to those of the delay unit. <IMAGE></p> |
